Semiconductor Cleanroom - Design Requirements

March 9, 2021

Imagine life without electronic devices. There would be no TVs, computers, cell phones, smart technology and the list goes on. Silicon chips are everywhere. Today’s developments in the semiconductor market place raise the bar for fabrication efficiency, and companies are looking to build more effective and sustainable production environments. Before we dive into semiconductor cleanroom considerations lets dial it back and review semiconductors and the critical environments they are manufactured in.

So, what is a semiconductor?

Semiconductors are materials which have a conductivity between conductors (typically metals) and nonconductors or insulators (such asceramics). They are typically referred to as integrated circuits or microchips and are made from pure elements such as silicon or germanium, or compounds such as gallium arsenide. Semiconductors are an essential component enabling advancements in renewable energy, healthcare, clean energy, and other applications.

What is a semiconductor fab?

A semiconductor fab is a manufacturing plant in which raw silicon wafers are turned into integrated circuits. Photo lithography is a part of the manufacturing process inside of the cleanroom. This process involves photographing the circuit pattern on a photosensitive substrate and chemically etching away the background. Types of chips manufactured in a semiconductor fab are:

·      NAND flash

·      DRAM for memory

·      Microprocessor

·      Graphics controller

·      Hard drive controller

·      RAID controller

Once completed, these chips go into a wide range of devices such as computers, mobile phones, televisions, laptops, drones, military equipment, and automobiles.

Typical Semiconductor Cleanroom Considerations

Chip manufacturers face a variety of challenges when designing and operating a semiconductor cleanroom. Extremely detailed processes and controlled environments are essential to produce wafers. When one speck of dust can destroy the functionality of a chip, the only way to avoid contamination is to control the environment.

Contamination is a huge source of production issues when it comes to product failure. Human workers are most often the main source of contamination when operating a semiconductor fab. Workers can create unwanted ESD (electrostatic discharge) that can destroy delicate electronic circuits. Other potential contamination occurrences are:

·      Glitch in power

·      Fan motor breaking

·      Pressure malfunction

·      Dropping equipment, tools, and parts

·      Wafer handling equipment can malfunction

Semiconductor cleanroom environments must be engineered to control static, particulate matter, outgassing, and other sources of contamination and compromising conditions. Environmental control is critical and maintaining the required levels of air purity is a non-negotiable for total performance of the cleanroom. To help maintain air purity, fabs utilize filtersat the ambient air inlet (make-up air handler, MUA), often in the return air handlers (RAH) and on top of cleanroom ceiling fan filter units (FFU).

Airflow arrangements is another critical factor in a semiconductor fab. Vertical Laminar Flow is common inside of the cleanroom. This is when air is blown from the ceiling down to the floor, creating a constant, uniform stream if air. Once the air reaches the raised access floor, it flows through the holes in the flooring passing upward through the air plenum to be purified through HEPA filters. The return air is then conditioned to control its temperature and humidity before it is cycled through the cleanroom again. When designing your cleanroom, you want to make sure that the airflow is affected as little as possible so that particles do not build up on any equipment.

What are other considerations?

Some other semiconductor fab considerations are furniture/equipment layout inside of the room. A typical design recommendation for equipment layout is to place the equipment along the outer walls avoiding areas where maximum airflow occurs. Wet benches where workers manipulate the wafers should also be positioned along the cleanroom walls.

High power exhausts built into any wet bench work areas extracting the chemical vapors generated during the manufacturing process should do so without disrupting air flow. You will also see wire racks and shelves inside of semiconductor fabs. This is for maximizing the airflow by eliminating flat surfaces where particles can collect. Wall surfaces in the cleanroom use a special design such as smooth aluminum wall surfaces to help keep air moving.

What classifications of semiconductor cleanrooms do we need?

Semiconductor fabs follow the ISO 14644 standard. Specification for device fabrication cleanrooms vary based on process type, line width, and wafer size requirements. Semiconductor cleanrooms requirements can range from ISO 4 (Class 10) to ISO 6 (Class 1,000) cleanrooms.

Certain operations may have an ISO 7 Class (10,000) or ISO 8Class (100,000) background, but all considerations are handled on a project-by-project basis.

Now what?

AdvanceTEC is the market leader of turn-key design build cleanrooms for nanotechnology and semiconductor device fabs. Our advanced 3D BIM / VDC modeling, high purity process integration, and fast-track clean build methodologies have been leveraging by leading technology companies across the world. Our skillset serves customers across projects ranging from pilot lines, high volume fabs, or foundry applications.

Need a semiconductor fab that is tailored to your specific ISO level, with certainty of cost, schedule and total performance? How about a cleanroom that is fitted with your specific process and meets your time to market requirements? Great! AdvanceTEC’s in-house team of experts are here for wherever and whatever your project might need. From concept through commissioning, ISO certification and owner training - AdvanceTEC engineers, models, and builds to your innovations and achieves your business plans.

Bryan Phelan
Managing Partner, Director of Customers

As managing partner, Phelan is responsible for ensuring client satisfaction, shaping the company’s strategic direction, and managing all compliance aspects of the organization.

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